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About HiSilicon
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Built for PV and industry lighting
Communications• Peak rate at the physical layer: 0.507 Mbit/s |
Power Consumption• Static power consumption (SoC): ≤ 50 mW |
Physical Layer Features• Implementation of the IEEE 1901.1 standard, enabling the SoC to interconnect and communicate with other equivalent SoCs |
MAC Features• TDMA and CSMA/CA, offering the conflict avoidance mechanism |
Networking Features• Automatic fast networking within 10 seconds in a typical scenario with 500 nodes on a 2-layer network |
CPU• High-performance Cortex-M3 processor operating at 200 MHz |
Peripheral Interfaces• 1x SPI, 1x I2C interface, 2x UART interfaces, 1x flash interface, 2x PGA interfaces, 6x GPIO interfaces, 1x 12-bit 4-channel AD input, and 1x PWM interface |
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